Many semiconductor devices employing Schottky barrier junctions, such as junction type field effect transistors, including GaAs field effect transistors (GaAs FET) and high electron mobility transistors (HEMT), are known.
FIG. 2 shows an example of a field effect transistor. In FIG. 2, a semiconductor body 1, comprising n type GaAs, is the active region of a field effect transistor. In a HEMT, layer 1 may comprise several layers of n-AlGaAs/GaAs or n-GaAs/n-AlGaAs/GaAs. Gate electrodes 2 comprising aluminum layers 22 form Schottky barrier junctions with surfaces of the semiconductor body 1. Depletion layers 3 may obstruct a current flowing from the source electrode 4 to the drain electrode 5. The thickness of this depletion layer 4 is controlled by the voltage applied to the gate electrode 2. V.sub.D designates a power supply connected between the source electrode 4 and the drain electrode 5. V.sub.G designates a control power supply connected between the source electrode 4 and the gate electrode 2.
In the prior art semiconductor device of such a construction, aluminum layers 22 are generally used as gate electrodes 2 for the following reasons.
(a) The low resistivity of the aluminum layer 22 reduces the gate parasitic resistance (Rg) which adversely affects the performance of the field effect transistor.
(b) The aluminum layer 22 can be produced relatively easily.
There are, however, the following drawbacks in the gate electrodes 2 using aluminum layers 22.
(1) The pure aluminum layer 22 is likely to undergo stress migration or electro-migration, and, therefore, voids are likely to be produced at the gate electrode 2 due to thermal stresses and electric stresses. As a result, an undersirable phenomenon called a non-pinchoff is likely to arise.
(2) The aluminum layer 22 does not adhere well to semiconductor body 1 and it is difficult to obtain good Schottky barrier characteristics.
In order to overcome the disadvantages of the gate electrodes 2 using aluminum layers 22, a gate electrode 2 using a gold (Au) layer which has good resistance to stresses can be conceived. However, a Au layer has no thermal stability as a Schottky electrode and reacts with the semiconductor body 1, destroying the rectifying characteristics of the barrier and its usefulness in a field effect transistor.
To solve the above-described problems, a device in which gate electrode 2 includes multiple metal layers as shown in FIG. 3 has been conceived. In FIG. 3, the same reference numerals designate the same elements as those shown in FIG. 2. In FIG. 3, a titanium layer 23 forms a Schottky barrier junction with the main surface of the semiconductor body 1. A platinum layer 24 is disposed on the upper surface of the titanium layer 23. A gold layer 25 is disposed on the upper surface of the platinum layer 24 for reducing the gate parasitic resistance (Rg) and resisting stresses. In this case, the intrusion of Au atoms from layer 25 into the semiconductor body 1 is prevented by the platinum layer 24. In a device in which the gate electrode 2 comprises titanium layer 23, platinum layer 24, and Au layer 25, gold is deposited not only on layer 24 but also on the sides of layers 23 and 24 as shown in FIG. 4. Au layer 25 comes in direct contact with the semiconductor body 1 and reacts with it, thereby producing a non-rectifying contact and destroying field effect transistor action. Furthermore, platinum for layer 24 is difficult to evaporate due to its low vapor pressure, making production quite difficult.
In the above-described prior art semiconductor devices, has been impossible to realize a semiconductor device having a gate electrode 2 with a small gate parasitic resistance (Rg) and good adhesion to semiconductor body 1 that is resistant to stress and easy to produce.